Rust XHCI Implementation.
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0b95098748
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1b2ca34dd5
23 changed files with 707 additions and 110 deletions
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@ -78,6 +78,10 @@ impl MemoryRegion {
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})
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}
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pub fn vaddr(&self) -> usize {
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self.virt_addr as usize
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}
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pub fn slice<T>(&self) -> &[T] {
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unsafe {
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slice::from_raw_parts(
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@ -246,11 +250,11 @@ pub fn map_cap_and_leak(mem_cap: Capability) -> u64 {
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vaddr
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}
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pub fn map_direct_physical_and_leak(paddr: u64, size: u64) -> u64 {
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pub fn map_direct_physical_and_leak<T>(paddr: u64, size: u64) -> *mut T {
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let mem_cap = syscall::memory_object_direct_physical(paddr, size).unwrap();
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let vaddr = syscall::address_space_map(&mem_cap).unwrap();
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mem_cap.release();
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vaddr
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vaddr as *mut T
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}
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pub fn map_physical_and_leak(size: u64) -> (u64, u64) {
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@ -54,6 +54,12 @@ impl<T> PhysicalBox<[T]> {
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let (memory_region, paddr) =
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MemoryRegion::contiguous_physical(layout.size() as u64).expect("Failed to allocate");
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crate::debug!(
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"Physical box allocated: v {:0x} p {:0x}",
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memory_region.vaddr(),
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paddr
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);
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let ptr: *mut T = memory_region.mut_ptr_at_offset(0);
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for i in 0..len {
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unsafe {
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@ -72,15 +72,15 @@ impl PciDevice {
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control.capable_address_64(),
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"We don't handle the non-64bit case for MSI yet."
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);
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assert!(
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control.multi_message_capable() == 0,
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"We don't yet handle multi-message capable devices."
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);
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if control.multi_message_capable() != 0 {
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mammoth::debug!("WARN: We don't yet handle multi-message capable devices.");
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}
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// FIXME: These probably need to be volatile writes.
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let header: &mut PciDeviceHeader = self.memory_region.as_mut();
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header.command = header.command.with_interrupt_disable(true);
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msi_cap.msi_control = control.with_msi_enable(true);
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msi_cap.msi_control = control.with_msi_enable(true).with_multi_message_enable(0);
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// For setting addr and data field, see intel ref
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// Vol 3. Section 11.11
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