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Specify our target in .ccls

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Drew Galbraith 2023-06-16 23:15:41 -07:00
parent 35f24e7c77
commit 4c936623b5
2 changed files with 3 additions and 1 deletions
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2
.ccls Normal file
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@ -0,0 +1,2 @@
%compile_commands.json
--target=x86_64-pc-acadia-elf

2
sys/yellowstone/yellowstone.cpp
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@ -6,7 +6,7 @@
#include "hw/pcie.h" #include "hw/pcie.h"
int main(uint64_t port_cap) { uint64_t main(uint64_t port_cap) {
dbgln("Yellowstone Initializing."); dbgln("Yellowstone Initializing.");
uint64_t msg_type, type, cap, bytes, caps; uint64_t msg_type, type, cap, bytes, caps;
check(ZPortRecv(port_cap, 8, reinterpret_cast<uint8_t*>(&msg_type), 1, &cap, check(ZPortRecv(port_cap, 8, reinterpret_cast<uint8_t*>(&msg_type), 1, &cap,