[Zion][Yellowstone] First pass at adding PCI ioport access.

zion/object/kernel_object.h

@@ -16,6 +16,10 @@ class KernelObject : public glcr::RefCounted<KernelObject> {
     REPLY_PORT = 0x8,
     MUTEX = 0x9,
     SEMAPHORE = 0x10,
+
+    // Temporary.
+    PCI_CAP = 0x100,
+    PCI_BOUND_CAP = 0x101,
   };
 
   virtual uint64_t TypeTag() = 0;

zion/object/pci_port.cpp

@@ -0,0 +1,46 @@
+#include "object/pci_port.h"
+
+#include "common/port.h"
+
+namespace {
+
+const uint16_t PCI_ADDR_PORT = 0xCF8;
+const uint16_t PCI_DATA_PORT = 0xCFC;
+
+uint32_t AddressOf(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
+  uint32_t lbus = (uint32_t)bus;
+  uint32_t lslot = (uint32_t)slot;
+  uint32_t lfunc = (uint32_t)func;
+
+  return (uint32_t)((lbus << 16) | (lslot << 11) | (lfunc << 8) |
+                    (offset & 0xFC) | ((uint32_t)0x80000000));
+}
+
+uint32_t PciReadAtOffset(uint8_t bus, uint8_t slot, uint8_t func,
+                         uint8_t offset) {
+  uint32_t address = AddressOf(bus, slot, func, offset);
+  outl(PCI_ADDR_PORT, address);
+  return inl(PCI_DATA_PORT);
+}
+
+void PciWriteAtOffset(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset,
+                      uint32_t word) {
+  uint32_t address = AddressOf(bus, slot, func, offset);
+  outl(PCI_ADDR_PORT, address);
+  outl(PCI_DATA_PORT, word);
+}
+
+}  // namespace
+
+uint32_t PciPort::ReadAtOffset(uint8_t bus, uint8_t slot, uint8_t func,
+                               uint8_t offset) {
+  return PciReadAtOffset(bus, slot, func, offset);
+}
+
+uint32_t PciPortBound::Read(uint8_t offset) {
+  return PciReadAtOffset(bus_, slot_, func_, offset);
+}
+
+void PciPortBound::Write(uint8_t offset, uint32_t data) {
+  PciWriteAtOffset(bus_, slot_, func_, offset, data);
+}

zion/object/pci_port.h

@@ -0,0 +1,60 @@
+#include <glacier/memory/ref_ptr.h>
+
+#include "include/ztypes.h"
+#include "object/kernel_object.h"
+
+class PciPort;
+class PciPortBound;
+
+template <>
+struct KernelObjectTag<PciPort> {
+  static const uint64_t type = KernelObject::PCI_CAP;
+};
+
+class PciPort : public KernelObject {
+ public:
+  static uint64_t DefaultPermissions() {
+    return kZionPerm_Write | kZionPerm_Read | kZionPerm_Duplicate |
+           kZionPerm_Transmit;
+  }
+
+  uint64_t TypeTag() override { return KernelObject::PCI_CAP; }
+
+  static glcr::RefPtr<PciPort> Create() { return glcr::AdoptPtr(new PciPort); }
+
+  uint32_t ReadAtOffset(uint8_t bus, uint8_t slot, uint8_t func,
+                        uint8_t offset);
+
+ private:
+  PciPort() {}
+};
+
+template <>
+struct KernelObjectTag<PciPortBound> {
+  static const uint64_t type = KernelObject::PCI_BOUND_CAP;
+};
+
+class PciPortBound : public KernelObject {
+ public:
+  static uint64_t DefaultPermissions() {
+    return kZionPerm_Write | kZionPerm_Read | kZionPerm_Duplicate;
+  }
+
+  uint64_t TypeTag() override { return KernelObject::PCI_BOUND_CAP; }
+
+  static glcr::RefPtr<PciPortBound> Create(uint8_t bus, uint8_t slot,
+                                           uint8_t func) {
+    return glcr::AdoptPtr(new PciPortBound(bus, slot, func));
+  }
+
+  uint32_t Read(uint8_t offset);
+  void Write(uint8_t offset, uint32_t data);
+
+ private:
+  PciPortBound(uint8_t bus, uint8_t slot, uint8_t func)
+      : bus_(bus), slot_(slot), func_(func) {}
+
+  uint8_t bus_;
+  uint8_t slot_;
+  uint8_t func_;
+};