30bb10207e
Begin enumerating information from the PCI structure and HBA AHCI structures. Currently the PCI structure address is hardcoded but it should be passed via a capability from the init process in the future.
76 lines
1.7 KiB
C++
76 lines
1.7 KiB
C++
#pragma once
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#include <zerrors.h>
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struct PciDeviceHeader {
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uint16_t vendor_id;
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uint16_t device_id;
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uint16_t command_reg;
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uint16_t status_reg;
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uint8_t revision;
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uint8_t prog_interface;
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uint8_t subclass;
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uint8_t class_code;
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uint8_t cache_line_size;
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uint8_t latency_timer;
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uint8_t header_type;
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uint8_t bist;
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uint32_t bars[5];
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uint32_t abar;
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uint32_t subsystem_id;
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uint32_t expansion_rom;
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uint8_t cap_ptr;
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uint8_t reserved[7];
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uint8_t interrupt_line;
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uint8_t interrupt_pin;
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uint8_t min_grant;
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uint8_t max_latency;
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} __attribute__((packed));
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struct AhciHba {
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uint32_t capabilities;
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uint32_t global_host_control;
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uint32_t interrupt_status;
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uint32_t port_implemented;
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uint32_t version;
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uint32_t ccc_ctl; // 0x14, Command completion coalescing control
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uint32_t ccc_pts; // 0x18, Command completion coalescing ports
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uint32_t em_loc; // 0x1C, Enclosure management location
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uint32_t em_ctl; // 0x20, Enclosure management control
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uint32_t capabilities_ext;
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uint32_t bohc; // 0x28, BIOS/OS handoff control and status
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};
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struct AhciPort {
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uint64_t command_list_base;
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uint64_t fis_base;
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uint32_t interrupt_status;
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uint32_t interrupt_enable;
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uint32_t command;
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uint32_t reserved;
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uint32_t task_file_data;
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uint32_t signature;
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uint32_t sata_status;
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uint32_t sata_control;
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uint32_t sata_error;
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uint32_t sata_active;
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uint32_t command_issue;
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uint32_t sata_notification;
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uint32_t fis_based_switching_ctl;
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uint32_t device_sleep;
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};
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class AhciDriver {
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public:
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z_err_t Init();
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void DumpCapabilities();
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void DumpPorts();
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private:
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PciDeviceHeader* pci_device_header_ = nullptr;
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AhciHba* ahci_hba_ = nullptr;
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z_err_t LoadPciDeviceHeader();
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z_err_t LoadHbaRegisters();
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};
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